Minimize ground loops using the following methods:
Keep all power and ground traces as close as possible.
Keep signal lines as close as possible to ground circuits.
Use properly the decoupling capacitors.
Keep trace lengths as short as possible.
Fill in unused areas of the board with as much ground plane as possible. Via-connect these ground fill areas to chassis ground in as many places as possible.
Moat or partition ESD-sensitive components away from other sensitive circuits.
Internal ground planes should surround every plated throughhole to minimize ground loops.
If power and ground are implemented as a grid on the board, connect the traces together in as many locations as possible to minimize loop areas.
Use an image plane adjacent to each signal routing layer in ESD-sensitive areas.