Provide decoupling capacitors on circuits that contain high-frequency RF energy or have clock edges faster than 3 ns. Calculate capacitance value for optimal performance and frequency range of interest. Do not guess this value or use the same capacitance value from previous designs.

Measure or calculate the self-resonant frequency of the printed circuit board’s power and ground planes. These planes perform as a decoupling capacitor all by themselves. Use this built-in decoupling capacitor to maximum advantage.

Power planes generally provide an adequate low self-resonant frequency decoupling for standard TTL components.

Keep lead lengths of capacitors as short as possible to minimize lead length inductance.

Fewer decoupling capacitors may be better than many. If too many decoupling capacitors are used, excessive current draw from the power supply could occur, placing a strain on the power supply.

 Place clocks and oscillators in a separate clock generation area. Make provisions for a localized ground plane and doghouse (case shield) around the oscillator and related high speed, high current drivers. Locate clock generation circuits near a ground stitch location.

Always install the clock circuits (oscillators, crystals, drivers etc.) directly on the printed circuit board, not on sockets.