Maintain impedance control for all clock traces. Calculate impedance for both microstrip and stripline implementation.

Be aware of the propagation delay of signal traces routed either microstrip or stripline.

Calculate capacitive loading of all components and properly compensate with a series resistor and/or end termination.

The higher the switching speed (edge rate of the signal), the more important the series termination resistor from the clock driver must equal trace impedance Z₀. A perfect match exists when impedance of the drive device source, Z_s, added to the value of the series termination resistor equals the trace impedance.

Decouple clock components with capacitor having a self-resonant frequency higher than the clock harmonics requiring suppression. Decoupling may include a single capacitor or two capacitors in parallel.

Printed circuit boards generally have a self-resonant frequency in the 200-400 MHz range. Use this built-in decoupling capacitor in the power planes to maximum advantage.

Minimize or prevent routing clock traces with vias. Vias add inductance to the trace (approximately 1-3 nH each). Vias could change the trace impedance causing possible non-functionality or EMI emissions.