The decoupling capacitor created naturally in multi-layer PCBs in which the power plane is adjacent to the ground plane is the best solution to reduce the parasitic elements because the parasitic inductance is very small due to a very large contour and a good magnetic coupling factor. It can be modulated by a LC circuit if the largest dimension between the source and the load is less than 1 tenth of the minimum wave length (< 1/10 ∙ λ_min). Otherwise the PCB acts as a line or an antenna. The PCB capacitor consists in two copper planes with a dielectric inserted between the two planes. The equivalent capacitor (C_Pcb) is evaluated using the formula of the figure 6. For example, a 10cm x 10cm plane with 35µm thickness and separated by 1.6mm has a total inductance of 0.05nH and a capacitance equal to 271pF.

Fig. 6 A native PWR(VCC)-GND(VSS) planes capacitor