When selecting parallel capacitors, remember that as the larger value capacitor goes inductive, the smaller value capacitor is still capacitive. At a particular frequency, an LC circuit is developed between the two capacitors, and an infinite impedance could be generated with no decoupling provided at all. When this occurs, single-capacitor bypassing is generally sufficient.
Keep lead lengths of capacitors as short as possible to minimize lead length inductance.
Place parallel bypass capacitors on all power and ground input connections on the printed circuit board in addition to components with edge rates faster than 3 ns.
Place clocks and oscillators in a separate clock generation area. Make provisions for a localized ground plane and doghouse (case shield) around the oscillator and related high speed, high current drivers. Locate clock generation circuits near a ground stitch location.
Always install the clock circuits (oscillators, crystals, drivers etc.) directly on the printed circuit board, not on sockets.
The wider the trace, the less impedance presented to the circuit.