Presence of two heavily doped n-type regions (n+) in the p-type material Source and drain
n-channel MOS (NMOS) transistor (Positive value of VG and VD) More frequently used Higher mobility of electrons - fast response
Similar arrangement using an n-type substrate: p-channel MOS (PMOS) transistor (Negative value of VG and VD) More easily fabricated than NMOS
NMOS Operation:
Drain region with the surrounding substrate form p-n junction Source grounded: VS = 0 VD has a small positive value
VG = 0 iD ~ 0 p-n junction reversed biased
VG very small Region 'R' is depleted p-n junction reversed biased iD ~ 0
VG increased Region 'R' is inverted Layer containing mobile electrons is formed Inversion layer (channel) Connects the drain to the source iD > 0
Threshold voltage VT ... smallest value of VG necessary to produce a channel Usually VT corresponds to the value of VG needed for iD = 1 A (may range from a fraction of a volt to several volts)